Semiconductor resistor formed in metal gate stack

US7879666B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Da Zhang · New Taipei, TW
• Chendong Zhu · Hopewell Junction, US
• Xiangdong Chen · Irvine, US
• Melanie J. Sherony · Fishkill, US

Key dates

• Filing date: Jul 23, 2008
• Grant date: Feb 1, 2011
• Expiry date: Jan 21, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/47

Abstract

A semiconductor process and apparatus fabricate a metal gate electrode (30) and an integrated semiconductor resistor (32) by forming a metal-based layer (26) and semiconductor layer (28) over a gate dielectric layer (24) and then selectively implanting the resistor semiconductor layer (28) in a resistor area (97) to create a conductive upper region (46) and a conduction barrier (47), thereby confining current flow in the resistor semiconductor layer (36) to only the top region (46) in the finally formed device.