Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers
US7892928B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2007 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Apr 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.