Molded integrated circuit package and method of forming a molded integrated circuit package
US7906857B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2008 |
| Grant date | Mar 15, 2011 |
| Priority date | — |
| Expiry date | Jul 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A molded integrated circuit package is described. The molded integrated circuit package comprises a substrate having a plurality of contacts on a first surface; a die having a plurality of solder bumps on a first surface, the plurality of solder bumps being coupled to the plurality of contacts on the first surface of the substrate; an adhesive material positioned on a second surface of the die; a lid attached to the adhesive material; and an encapsulant positioned between the lid and the substrate. Methods of forming molded integrated circuit packages are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.