Reducing contamination of semiconductor substrates during beol processing by providing a protection layer at the substrate edge

US7915170B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Su Ruo Qing · Dresden, DE
• Frank Feustel · Dresden, DE
• Carsten Peters · Dresden, DE

Key dates

• Filing date: Jan 22, 2007
• Grant date: Mar 29, 2011
• Expiry date: May 16, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76802
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

By providing a protection layer at the bevel region, the deposition of polymer materials during the patterning process of complex metallization structures may be reduced. Additionally or alternatively, a surface topography may be provided, for instance in the form of respective recesses, in order to enhance the degree of adhesion of any materials deposited in the bevel region during the manufacturing of complex metallization structures. Advantageously, the provision of the protection layer providing the reduced polymer deposition may be combined with the modified surface topography.