Apparatus for flip-chip packaging providing testing capability
US7915718B2 · kind B2 · utility
15Cited by
206References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 2002 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Dec 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1532
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for increasing the integrated circuit density in a flip-chip semiconductor device assembly including an interposer substrate facilitating use with various semiconductor die conductive bump arrangements. The interposer substrate includes a plurality of recesses formed in at least one of a first surface and a second surface thereof, wherein the recesses are arranged in a plurality of recess patterns. The interposer substrate also provides enhanced accessibility for test probes for electrical testing of the resulting flip-chip semiconductor device assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.