Method of erasing a resistive memory device
US7916523B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2006 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | Jan 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a first method of erasing a resistive memory device, an electrical potential is applied to the gate of a transistor in series with the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials across the resistive memory device. In a second method of erasing a resistive memory device, an electrical potential is applied across the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials to the gate of a transistor in series with the resistive memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.