DRAM having deep trench capacitors with lightly doped buried plates
US7923815B2 · kind B2 · utility
10Cited by
13References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2008 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Jan 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/212
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
By controlling buried plate doping level and bias condition, different capacitances can be obtained from capacitors on the same chip with the same layout and deep trench process. The capacitors may be storage capacitors of DRAM/eDRAM cells. The doping concentration may be less than 3E19cm−3, a voltage difference between the biases of the buried electrodes may be at least 0.5V, and a capacitance of one capacitor may be at least 1.2 times, such as 2.0 times the capacitance of another capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.