Inventor · San Jose, CA, US

Johnathan E. Faltermeier

65Patents

14h-index

121Co-inventors

87Inventor score

Filing activity: Jan 21, 1998 → Nov 29, 2017

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7118986B2	STI formation in semiconductor device including SOI and bulk silicon regions	Electricity	240	Expired
US7993999B2	High-K/metal gate CMOS finFET with improved pFET threshold voltage	Electricity	100	Active
US6268299A	Variable stoichiometry silicon nitride barrier films for tunable etch selectivity and enhanced hyrogen permeability	Electricity	52	Expired
US6130145A	Insitu doped metal policide	Electricity	29	Expired
US8420464B2	Spacer as hard mask scheme for in-situ doping in CMOS finFETs	Electricity	28	Active
US8716797B2	FinFET spacer formation by oriented implantation	Electricity	25	Active
US7951657B2	Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (S0I) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor	Electricity	25	Active
US6518641B2	Deep slit isolation with controlled void	Electricity	24	Expired
US6444516B1	Semi-insulating diffusion barrier for low-resistivity gate conductors	Electricity	22	Expired
US6555430B1	Process flow for capacitance enhancement in a DRAM trench	Emerging Cross-Sectional Technologies	21	Expired
US7193262B2	Low-cost deep trench decoupling capacitor device and process of manufacture	Electricity	20	Expired
US8928057B2	Uniform finFET gate height	Electricity	17	Active
US6746933B1	Pitcher-shaped active area for field effect transistor and method of forming same	Electricity	16	Expired
US8367544B2	Self-aligned patterned etch stop layers for semiconductor devices	Electricity	15	Active
US8901664B2	High-K/metal gate CMOS finFET with improved pFET threshold voltage	Electricity	14	Active
US9105559B2	Conformal doping for FinFET devices	Electricity	13	Active
US9865703B2	High-K layer chamfering to prevent oxygen ingress in replacement metal gate (RMG) process	Electricity	13	Active
US7923815B2	DRAM having deep trench capacitors with lightly doped buried plates	Electricity	10	Active
US6150670A	Process for fabricating a uniform gate oxide of a vertical transistor	Emerging Cross-Sectional Technologies	10	Expired
US9337315B2	FinFET spacer formation by oriented implantation	Electricity	9	Active
US6194736A	Quantum conductive recrystallization barrier layers	Electricity	8	Expired
US8525186B2	Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (SOI) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor	Electricity	8	Active
US9559009B2	Gate structure cut after formation of epitaxial active regions	Electricity	7	Active
US9318578B2	FinFET spacer formation by oriented implantation	Electricity	7	Active
US6960523B2	Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device	Electricity	7	Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.