Field effect transistor having a stressed contact etch stop layer with reduced conformality
US7932166B2 · kind B2 · utility
7Cited by
1References
22Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 29, 2007 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Dec 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By forming a highly non-conformal stressed overlayer, such as a contact etch stop layer, the efficiency of the stress transfer into the respective channel region of a field effect transistor may be significantly increased. For instance, non-conformal PECVD techniques may be used for forming highly stressed silicon nitride in a non-conformal manner, thereby achieving higher transistor performance for otherwise identical stress conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.