Patent · US Active

Memory device and method providing logic connections for data transfer

US7940575B2 · kind B2 · utility

6Cited by
2References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 28, 2008
Grant dateMay 10, 2011
Priority date
Expiry dateApr 21, 2029

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In an embodiment, a method for transferring data in a memory device is provided. The method may include transferring data from a first memory cell arrangement including a plurality of memory cells to a second memory cell arrangement including a plurality of memory cells via a connecting circuit arrangement coupled to the plurality of memory cell arrangements and providing a plurality of controllable connections via a plurality of connecting circuit terminals, the memory cell arrangements being connected with at least one connecting circuit terminal of the plurality of connecting circuit terminals, wherein the connecting circuit is configured to provide arbitrarily controllable signal flow connections between the plurality of connecting circuit terminals. The data are transferred via a logic connection using the controllable connections. Simultaneously, a further logic connection may be provided to a memory cell arrangement of the memory cell arrangements using the controllable connections.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.