Technique for enhancing transistor performance by transistor specific contact design

US7964970B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Martin Gerhardt · Dresden, DE
• Ralf Richter · Dresden, DE
• Thomas Feudel · Radebeul, DE
• Uwe Griebenow · Markkleeberg, DE

Key dates

• Filing date: Dec 26, 2007
• Grant date: Jun 21, 2011
• Expiry date: Aug 27, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0212
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

By locally adapting the size and/or density of a contact structure, for instance, within individual transistors or in a more global manner, the overall performance of advanced semiconductor devices may be increased. Hence, the mutual interaction between the contact structure and local device characteristics may be taken into consideration. On the other hand, a high degree of compatibility with conventional process strategies may be maintained.