Die stacking apparatus and method
US7969020B2 · kind B2 · utility
1Cited by
24References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Jun 28, 2011 |
| Priority date | — |
| Expiry date | Aug 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second semiconductor die is provided that has a second bulk semiconductor side and a second opposite side. The second opposite side of the second semiconductor die is coupled to the first opposite side of the first semiconductor die. Electrical connections are formed between the first semiconductor die and the second semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.