Thermal annealing method for preventing defects in doped silicon oxide surfaces during exposure to atmosphere
US7977246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2008 |
| Grant date | Jul 12, 2011 |
| Priority date | — |
| Expiry date | Dec 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76828
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thermal anneal process for preventing formation of certain BPSG surface defects following an etch or silicon clean step using a fluorine and hydrogen chemistry. The thermal anneal process is carried out while protecting the wafer from moisture, by heating the wafer to a sufficiently high temperature for a sufficient duration of time to thermally diffuse boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer into the bulk of the layer. The thermal anneal process is completed by cooling the wafer to a sufficiently low temperature to fix the distribution of the boron and/or phosphorus materials in bulk of the doped glass layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.