Methods for relaxation and transfer of strained layers and structures fabricated thereby

US7981767B2 · kind B2 · utility

Assignee

• S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES · FR

Inventors

• Pascal Guenard · Meylan, FR
• Bruce Faure · Grenoble, FR
• Fabrice Letertre · Grenoble, FR
• Michael R. Krames · Los Altos, US
• Nathan Gardner · Provo, US
• Melvin McLaurin · Midland School, US

Key dates

• Filing date: Dec 22, 2008
• Grant date: Jul 19, 2011
• Expiry date: Oct 15, 2029

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P70/50
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The present invention provides methods for forming at least partially relaxed strained material layers on a target substrate. The methods include forming islands of the strained material layer on an intermediate substrate, at least partially relaxing the strained material islands by a first heat treatment, and transferring the at least partially relaxed strained material islands to the target substrate. The at least partial relaxation is facilitated by the presence of low-viscosity or compliant layers adjacent to the strained material layer. The invention also provides semiconductor structures having an at least partially relaxed strained material layer, and semiconductor devices fabricated using an at least partially relaxed strained material layer.