Method for fabricating a transistor structure

US8003475B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Josef Bock · Birkenfeld, DE
• Rudolf Lachner · Ingolstadt, DE
• Thomas Meister · Taufkirchen, DE
• Reinhard Stengl · Stadtbergen, DE
• Herbert Schafer · Höhenkirchen-Siegertsbrunn, DE
• Martin Seck · Birkenfeld, DE

Key dates

• Filing date: Mar 20, 2008
• Grant date: Aug 23, 2011
• Expiry date: Apr 11, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/642

Abstract

A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.