Method for producing chip packages, and chip package produced in this way
US8012807B2 · kind B2 · utility
21Cited by
1References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2007 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | May 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.