Patent · US Active

CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof

US8017472B2 · kind B2 · utility

2Cited by

2References

31Claims

0Family size

Assignees

Infineon Technologies AG · DE
Chartered Semiconductor Manufacturing LTD · SG

Inventors

Jin-Ping Han · Fishkill, US
Yung Fu Chong · Singapore, SG

Key dates

Filing date	Feb 17, 2006
Grant date	Sep 13, 2011
Priority date	—
Expiry date	May 16, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/0188
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Semiconductor devices and methods of manufacturing thereof are disclosed. Isolation regions are formed that include a stress-altering material at least partially lining a trench formed within a workpiece. The isolation regions include an insulating material disposed over the stress-altering material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.