Low resistance peripheral local interconnect contacts with selective wet strip of titanium
US8026542B2 · kind B2 · utility
1Cited by
17References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2006 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Aug 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for forming memory devices and integrated circuitry, for example, DRAM circuitry, structures and devices resulting from such methods, and systems that incorporate the devices are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.