Patent · US Active

3-stack floorplan for floating point unit

US8032854B2 · kind B2 · utility

0Cited by

3References

8Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Maarten J. Boersma · Holzgerlingen, DE
Michael K. Kroener · Ehningen, DE
Petra Leber · Ehningen, DE
Silvia M. Mueller · Altdorf, DE
Jochen Preiss · Eppelheim, DE
Kerstin Claudia Schelm · Stuttgart, DE

Key dates

Filing date	Aug 29, 2008
Grant date	Oct 4, 2011
Priority date	—
Expiry date	Dec 2, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/392
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A 3-stack floorplan for a floating point unit includes: an aligner located in the center of the floating point unit; a frontend located directly above the aligner; a multiplier located directly below the frontend and next to the aligner; an adder located directly next to the multiplier and directly below the aligner; a normalizer located directly above the adder; and a rounder located directly above the normalizer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.