Integrated circuits and methods of design and manufacture thereof

US8039203B2 · kind B2 · utility

Assignees

• Infineon Technologies AG · DE
• International Business Machines Corporation · US

Inventors

• Helen Wang · Lagrangeville, US
• Scott D. Halle · Slingerlands, US
• Henning Haffner · Pawling, US
• Haoren Zhuang · Tokyo, JP
• Klaus Herold · Poughquag, US
• Matthew E. Colburn · Hopewell Junction, US
• Allen H. Gabor · Katonah, US
• Zachary Baum · Gardiner, US
• Scott M. Mansfield · Hopewell Junction, US
• Jason E. Meiring · Austin, US

Key dates

• Filing date: May 23, 2008
• Grant date: Oct 18, 2011
• Expiry date: Dec 13, 2029

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/942
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.