Method for prediction of premature dielectric breakdown in a semiconductor
US8053257B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2008 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Jun 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention predicts premature dielectric breakdown in a semiconductor. At least one dielectric breakdown mode is calculated for a layer within chips comprising a semiconductor wafer lot. If only one mode is calculated, that is the best calculated mode. If multiple modes can be calculated, a best mode that most accurately represents dielectric breakdown for the semiconductor wafer lot is determined. Premature dielectric breakdown will be associated with any semiconductor with a breakdown voltage less than a predetermined standard deviation from the best calculated mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.