Plasma procesor and plasma processing method
US8056503B2 · kind B2 · utility
38Cited by
8References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2002 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Jul 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/334
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., −400 to −600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.