Patent · US Active

Memory using multiple supply voltages

US8059482B2 · kind B2 · utility

12Cited by

5References

20Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Andrew C. Russell · Austin, US
Prashant U. Kenkare · Austin, US
Shayan Zhang · Cedar Park, US

Key dates

Filing date	Jun 19, 2009
Grant date	Nov 15, 2011
Priority date	—
Expiry date	Feb 27, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG11C5/145
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory has a method of operating that includes performing operations of a first type and a second type. A first voltage is coupled to a power supply node of a first memory cell of a memory array during a first operation of the first type. The first voltage is decoupled from the power supply node in response to terminating the first operation of the first type so as to allow the power supply node to drift. If the power supply node drifts to a second voltage, a power supply source is coupled to the power supply node. This is useful in reducing power in the circuit that produces the first voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.