Patent · US Active

Semiconductor device with arrangement of parallel conductor lines being insulated, between and orthogonal to external contact pads

US8080880B2 · kind B2 · utility

5Cited by
1References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 20, 2009
Grant dateDec 20, 2011
Priority date
Expiry dateJan 28, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/1461
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device and manufacturing method. One embodiment provides a device including a semiconductor chip. A first conductor line is placed over the semiconductor chip. An external contact pad is placed over the first conductor line. At least a portion of the first conductor line lies within a projection of the external contact pad on the semiconductor chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.