Patent · US Active

Forming an extremely thin semiconductor-on-insulator (ETSOI) layer

US8110483B2 · kind B2 · utility

5Cited by

12References

8Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Wagdi W. Abadeer · Jericho, US
Kiran V. Chatty · Williston, US
Jason E. Cummings · Smithfield, US
Toshiharu Furukawa · South Burlington, US
Robert J. Gauthier, Jr. · South Burlington, US
Jed H. Rankin · South Burlington, US
Robert R. Robison · Colchester, US
William R. Tonti · South Burlington, US

Key dates

Filing date	Oct 22, 2009
Grant date	Feb 7, 2012
Priority date	—
Expiry date	Oct 22, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH10D86/201
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Solutions for forming an extremely thin semiconductor-on-insulator (ETSOI) layer are disclosed. In one embodiment, a method includes providing a wafer including a plurality of semiconductor-on-insulator (SOI) layer regions separated by at least one shallow trench isolation (STI); amorphizing the plurality of SOI layer regions by implanting the plurality of SOI layer regions with an implant species; and removing a portion of the amorphized SOI layer region to form at least one recess in the amorphized SOI layer region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.