Method and apparatus for inspecting defects of circuit patterns
US8111902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2006 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Jan 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/2817
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a defect inspection apparatus for inspecting defects in patterns formed on a semiconductor device, on the GUI of which for the confirmation of the inspection results an area is provided for displaying any one of or facing each other the features amount of defects, and the image during inspection or the reacquired image, and on the GUI of which a means is provided for setting the classification class and importance of the defects, and based on the classification class and the importance of the defects information set by this setting means, the classification conditions or the defect judging conditions are automatically or manually set so that the inspection conditions may be set easily.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.