Deep trench isolation structures in integrated semiconductor devices
US8115273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2008 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | May 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76286
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A integrated semiconductor device has a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type over the first layer, a third semiconductor layer of a second conductivity type over the second layer, an isolation trench extending through the entire depth of the second and third layers into the first layer, and a first region of the second conductivity type located next to the isolation trench and extending from an interface between the second and third layers, along an interface between the second layer and the isolation trench. This first region can help reduce a concentration of field lines where the isolation trench meets the interface of the second and third layers, and hence provide a better reverse breakdown characteristic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.