Program failure handling in nonvolatile memory
US8132045B2 · kind B2 · utility
23Cited by
14References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2009 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Oct 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5643
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile memory system, data received from a host by a memory controller is transferred to an on-chip cache, and new data from the host displaces the previous data before it is written to the nonvolatile memory array. A safe copy is maintained in on-chip cache so that if a program failure occurs, the data can be recovered and written to an alternative location in the nonvolatile memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.