Patent · US Active

Semiconductor device comprising isolation trenches inducing different types of strain

US8138571B2 · kind B2 · utility

1Cited by
4References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 7, 2009
Grant dateMar 20, 2012
Priority date
Expiry dateFeb 25, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/601
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

By forming isolation trenches of different types of intrinsic stress on the basis of separate process sequences, the strain characteristics of adjacent active semiconductor regions may be adjusted so as to obtain overall device performance. For example, highly stressed dielectric fill material including compressive and tensile stress may be appropriately provided in the respective isolation trenches in order to correspondingly adapt the charge carrier mobility of respective channel regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.