Specifying an access hint for prefetching partial cache block data in a cache hierarchy
US8140759B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jul 1, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for specifying an access hint for prefetching only a subsection of cache block data, for more efficient system interconnect usage by the processor core. A processing unit receives a data cache block touch (DCBT) instruction containing an access hint and identifying a specific size portion of data to be prefetched. Both the access hint and a value corresponding to an amount of data to be prefetched are contained in separate subfields of the DCBT instruction. In response to detecting that the code point is set to a specific value, only the specific size of data identified in a sub-field of the DCBT and addressed in the DCBT instruction is prefetched into an entry in the lower level cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.