Semiconductor structure and method for making same
US8148257B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2010 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Sep 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One or more embodiments relate to a method of forming an electronic device, comprising: providing a workpiece; forming a first barrier layer over the workpiece; forming an intermediate conductive layer over the first barrier layer; forming a second barrier layer over the intermediate conductive layer; forming a seed layer over the second barrier layer; removing a portion of the seed layer to leave a remaining portion of the seed layer and to expose a portion of the second barrier layer; and electroplating a fill layer on the remaining portion of the seed layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.