Patterning mask and method of formation of mask using step double patterning
US8153522B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2010 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Mar 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a mask for use in fabricating an integrated circuit includes forming first non-removable portions of a photoresist material through a mask having a plurality of apertures, shifting the mask, forming second non-removable second portions of the photoresist material overlapping the first portions, and removing removable portions of the photoresist material arranged between the first and second portions. The formed photoresist mask may be used to form vias in an integrated circuit. The pattern of vias produced have the capability to exceed the current imaging resolution of a single exposure treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.