Patterning method
US8168375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2008 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Sep 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0228
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a patterning method including: forming a first film on a substrate; forming a multi-layered film including a resist film on the first film; forming a patterned resist film having a preset pattern by patterning the resist film by photolithography; forming a silicon oxide film different from the first film on the patterned resist film and the first film by alternately supplying a first gas containing organic silicon and a second gas containing an activated oxygen species to the substrate; etching the silicon oxide film to thereby form a sidewall spacer on a sidewall of the patterned resist film; removing the patterned resist film; and processing the first film by using the sidewall spacer as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.