Patent · US Active

Method of forming extremely thin semiconductor on insulator (ETSOI) device without ion implantation

US8169024B2 · kind B2 · utility

30Cited by
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13Claims
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Key dates

Filing dateAug 18, 2009
Grant dateMay 1, 2012
Priority date
Expiry dateMar 26, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/024

Abstract

A method of fabricating a semiconductor device is provided in which the channel of the device is present in an extremely thin silicon on insulator (ETSOI) layer, i.e., a silicon containing layer having a thickness of less than 10.0 nm. In one embodiment, the method may begin with providing a substrate having at least a first semiconductor layer overlying a dielectric layer, wherein the first semiconductor layer has a thickness of less than 10.0 nm. A gate structure is formed directly on the first semiconductor layer. A in-situ doped semiconductor material is formed on the first semiconductor layer adjacent to the gate structure. The dopant from the in-situ doped semiconductor material is then diffused into the first semiconductor layer to form extension regions. The method is also applicable to finFET structures.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.