Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device
US8202763B2 · kind B2 · utility
22Cited by
13References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2010 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | Oct 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1469
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a device, a semiconductor chip package, and a semiconductor chip assembly is disclosed. One embodiment includes applying at least one semiconductor chip on a first form element. At least one element is applied on a second form element. A material is applied on the at least one semiconductor chip and on the at least one element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.