Three-dimensional stacked substrate arrangements
US8203208B2 · kind B2 · utility
4Cited by
18References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2011 |
| Grant date | Jun 19, 2012 |
| Priority date | — |
| Expiry date | May 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.