Field effect transistor source or drain with a multi-facet surface

US8212336B2 · kind B2 · utility

Assignee

• ACORN TECHNOLOGIES, INC. · US

Inventors

• Andreas Goebel · Mountain View, US
• Paul A. Clifton · Santa Monica, US
• Daniel J. Connelly · San Francisco, US
• Vaishali Ukirde · San Jose, US

Key dates

• Filing date: Aug 27, 2009
• Grant date: Jul 3, 2012
• Expiry date: Jul 1, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6734

Abstract

FET configurations in which two (or more) facets are exposed on a surface of a semiconductor channel, the facets being angled with respect to the direction of the channel, allow for conformal deposition of a convex or concave S/D. A convex tip of the S/D enhances electric fields at the interface, reducing the resistance between the S/D and the channel. In contrast, a S/D having a concave tip yields a dual-gate FET that emphasizes reduced short-channel effects rather than electric field enhancement. The use of self-limiting, selective wet etches to expose the facets facilitates process control, control of interface chemistry, and manufacturability.