MOS semiconductor memory device having charge storage region formed from stack of insulating films
US8258571B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 20, 2008 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | Jan 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The invention provides a MOS semiconductor memory device that achieves excellent data retention characteristics while also achieving high-speed data write performance, low-power operation performance, and high reliability. A MOS semiconductor memory device 601 includes a first insulating film 111 and fifth insulating film 115 having large bandgaps 111a and 115a, a third insulating film 113 having the smallest bandgap 113a, and a second insulating film 112 and fourth insulating film 114 interposed between the third insulating film 113 and the first and fifth insulating films 111 and 115, respectively, and having intermediate bandgaps 112a and 114a.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.