Metal-semiconductor intermixed regions
US8278200B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 24, 2011 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Jan 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one exemplary embodiment, a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine for performing operations, said operations including: depositing a first layer having a first metal on a surface of a semiconductor structure, where depositing the first layer creates a first intermix region at an interface of the first layer and the semiconductor structure; removing a portion of the deposited first layer to expose the first intermix region; depositing a second layer having a second metal on the first intermix region, where depositing the second layer creates a second intermix region at an interface of the second layer and the first intermix region; removing a portion of the deposited second layer to expose the second intermix region; and performing at least one anneal on the semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.