Enhanced etch stop capability during patterning of silicon nitride including layer stacks by providing a chemically formed oxide layer during semiconductor processing

US8283232B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Sven Beyer · Dresden, DE
• Berthold Reimer · Dresden, DE
• Falk Graetsch · Dresden, DE

Key dates

• Filing date: May 24, 2010
• Grant date: Oct 9, 2012
• Expiry date: May 7, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A gate electrode structure may be formed on the basis of a silicon nitride cap material in combination with a very thin yet uniform silicon oxide based etch stop material, which may be formed on the basis of a chemically driven oxidation process. Due to the reduced thickness, a pronounced material erosion, for instance, during a wet chemical cleaning process after gate patterning, may be avoided, thereby not unduly affecting the further processing, for instance with respect to forming an embedded strain-inducing semiconductor alloy, while nevertheless providing the desired etch stop capabilities during removing the silicon nitride cap material.