Patent · US Active

Supporting multiple formats in a floating point processor

US8291003B2 · kind B2 · utility

9Cited by
6References
3Claims
0Family size

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Key dates

Filing dateSep 9, 2008
Grant dateOct 16, 2012
Priority date
Expiry dateJul 18, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F7/483
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a binary floating point processor, the exponents of each of the various types of operands are recoded into an internal format, by biasing the exponents with the minimum exponent value of the result precision (“Emin”), i.e., the recoded value of the exponent is the represented value of the exponent minus Emin. Emin depends only on the result precision of the instruction that is currently being executed in the binary floating point processor. The exponent computations are then performed in this new format. The underflow check for all result precisions is a check against zero and overflow checks are performed against a positive number that depends on the result precision. The exponent values are in a 2's complement representation, so the underflow check simply becomes a check of the sign bit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.