Asymmetric channel MOSFET
US8298897B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 23, 2012 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Mar 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor includes a partial SiGe channel, i.e., a channel including a SiGe channel portion, located underneath a gate electrode and a Si channel portion located underneath an edge of the gate electrode near the drain region. The SiGe channel portion can be located directly underneath a gate dielectric, or can be located underneath a Si channel layer located directly underneath a gate dielectric. The Si channel portion is located at the same depth as the SiGe channel portion, and contacts the drain region of the transistor. By providing a Si channel portion near the drain region, the GIDL current of the transistor is maintained at a level on par with the GIDL current of a transistor having a silicon channel only during an off state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.