Data recovery in multi-level cell nonvolatile memory
US8307241B2 · kind B2 · utility
26Cited by
33References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2009 |
| Grant date | Nov 6, 2012 |
| Priority date | — |
| Expiry date | Jun 18, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5643
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile memory array, data is stored in multi-level cells (MLC) as upper-page data and lower-page data. Safe copies of both upper-page and lower-page data are stored in on-chip cache during programming. If a write fail occurs, data is recovered from on-chip cache. The controller does not have to maintain safe copies of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.