Patent · US Active

Methods for manufacturing multilayer wafers with trench structures

US8309426B2 · kind B2 · utility

1Cited by
9References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 25, 2011
Grant dateNov 13, 2012
Priority date—
Expiry dateApr 25, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D1/047
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention provides methods for the manufacture of a trench structure in a multilayer wafer that comprises a substrate, an oxide layer on the substrate and a semiconductor layer on the oxide layer. These methods include the steps of forming a trench through the semiconductor layer and the oxide layer and extending into the substrate, and of performing an anneal treatment of the formed trench such that at the inner surface of the trench some material of the semiconductor layer flows at least over a portion of the part of the oxide layer exposed at the inner surface of the trench. Substrates manufactured according to this invention are advantageous for fabricating various semiconductor devices, e.g., MOSFETs, trench capacitors, and the like.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.