Konstantin Bourdelle
24Patents
7h-index
30Co-inventors
65Inventor score
Filing activity: Aug 10, 1998 → Feb 18, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6136672A | Process for device fabrication using a high-energy boron implant | Electricity | 14 | Expired |
| US7449394B2 | Atomic implantation and thermal treatment of a semiconductor layer | Electricity | 11 | Active |
| US8309431B2 | Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation | Electricity | 10 | Active |
| US7229898B2 | Methods for fabricating a germanium on insulator wafer | Electricity | 10 | Expired |
| US7670929B2 | Method for direct bonding two semiconductor substrates | Electricity | 9 | Active |
| US8058158B2 | Hybrid semiconductor substrate including semiconductor-on-insulator region and method of making the same | Electricity | 8 | Active |
| US7387947B2 | Method for transferring a thin layer including a controlled disturbance of a crystalline structure | Electricity | 8 | Expired |
| US8241942B2 | Method of fabricating a back-illuminated image sensor | Electricity | 5 | Active |
| US7575988B2 | Method of fabricating a hybrid substrate | Electricity | 5 | Active |
| US7799651B2 | Method of treating interface defects in a substrate | Electricity | 3 | Active |
| US7645486B2 | Method of manufacturing a silicon dioxide layer | Electricity | 3 | Active |
| US9035474B2 | Method for manufacturing a semiconductor substrate | Electricity | 3 | Active |
| US6930006B2 | Electronic circuit structure with improved dielectric properties | Electricity | 3 | Expired |
| US8263475B2 | Method for manufacturing heterostructures | Electricity | 3 | Active |
| US7407548B2 | Method of manufacturing a wafer | Electricity | 2 | Expired |
| US7833877B2 | Method for producing a semiconductor substrate | Electricity | 2 | Active |
| US9275892B2 | Method of high temperature layer transfer | Electricity | 2 | Active |
| US7572331B2 | Method of manufacturing a wafer | Electricity | 2 | Active |
| US6306780A | Method for making a photoresist layer having increased resistance to blistering, peeling, lifting, or reticulation | Electricity | 2 | Expired |
| US7767545B2 | Substrate production method and substrate including amorphization and recrystallizing a top region | Electricity | 1 | Expired |
| US7871900B2 | Quality of a thin layer through high-temperature thermal annealing | Electricity | 1 | Active |
| US8309426B2 | Methods for manufacturing multilayer wafers with trench structures | Electricity | 1 | Active |
| US9698063B2 | Method of testing a semiconductor-on-insulator structure and application of said test to the fabrication of such a structure | Electricity | 0 | Active |
| US9018678B2 | Method for forming a Ge on III/V-on-insulator structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.