Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers

US8314500B2 · kind B2 · utility

Assignee

• Ultratech · US

Inventors

• Luc Belanger · Granby, CA
• Stephen L. Buchwalter · Hopewell Junction, US
• Leena Paivikki Buchwalter · Hopewell Junction, US
• Ajay P. Giri · Poughkeepsie, US
• Jonathan H. Griffith · Hopewell Junction, US
• Donald W. Henderson · Ithaca, US
• Sung Kwon Kang · Chappaqua, US
• Eric H. Laine · Binghamton, US
• Christian Lavoie · Ossining, US
• Paul A. Lauro · Nanuet, US
• Valerie Oberson · Granby, CA
• Da-Yuan Shih · Poughkeepsie, US
• Kamalesh K. Srivastava · Wappingers Falls, US
• Michael J. Sullivan · Old Lyme, US

Key dates

• Filing date: Dec 28, 2006
• Grant date: Nov 20, 2012
• Expiry date: Jun 23, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/30107
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.