Method to compensate optical proximity correction
US8321820B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2012 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Feb 22, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method to compensate optical proximity correction adapted for a photolithography process includes providing an integrated circuit (IC) layout. The IC layout includes active regions, a shallow trench isolation (STI) region and ion implant regions overlapped with a part of the STI region and at least a part of the active regions. Subsequently, at least a photoresist line width compensation region disposed in the STI region is acquired in a photoresist covering region outside the ion implant regions according to the IC layout. Afterwards, the IC layout is corrected according to a width of the photoresist line width compensation region, a length of a side of the active region facing a side of the photoresist line width compensation region and a distance from the side of the photoresist line width compensation region to the active region facing the side. Then, the corrected IC layout is transferred to a photomask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.