Transistor with embedded Si/Ge material having enhanced across-substrate uniformity
US8334569B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Dec 18, 2012 |
| Priority date | — |
| Expiry date | Apr 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
In sophisticated semiconductor devices, a strain-inducing semiconductor alloy may be positioned close to the channel region by forming cavities on the basis of a wet chemical etch process, which may have an anisotropic etch behavior with respect to different crystallographic orientations. In one embodiment, TMAH may be used which exhibits, in addition to the anisotropic etch behavior, a high etch selectivity with respect to silicon dioxide, thereby enabling extremely thin etch stop layers which additionally provide the possibility of further reducing the offset from the channel region while not unduly contributing to overall process variability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.