Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

US8338885B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Jan Hoentschel · Dresden, DE
• Thomas Feudel · Radebeul, DE
• Ralf Illgen · Dresden, DE

Key dates

• Filing date: Feb 22, 2012
• Grant date: Dec 25, 2012
• Expiry date: Feb 22, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/015
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

During the fabrication of advanced transistors, significant dopant diffusion may be suppressed by performing a millisecond anneal process after completing the basic transistor configuration, wherein a stress memorization technique may also be obtained by forming a strain-inducing area within a sidewall spacer structure. Due to the corresponding void formation in the spacer structure, a high tensile strain component may be obtained, in the adjacent channel region.