Non-volatile semiconductor memory cell with dual functions
US8344445B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2012 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Mar 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory cell with dual functions includes a substrate, a first gate, a second gate, a third gate, a charge storage layer, a first diffusion region, a second diffusion region, and a third diffusion region. The second gate and the third gate are used for receiving a first voltage corresponding to a one-time programming function of the dual function and a second voltage corresponding to a multi-time programming function of the dual function. The first diffusion region is used for receiving a third voltage corresponding to the one-time programming function and a fourth voltage corresponding to the multi-time programming function. The second diffusion region is used for receiving a fifth voltage corresponding to the multi-time programming function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.